The Intel Xeon Phi Coprocessor
Hey Guys.
As a part of my new assignment, I have begun reading about the all new and powerful Intel Xeon Phi co-processor and its capabilities.
Here is a brief understanding of the basics.
1. What is High Performance Computing (HPC) ?
High-performance computing (HPC) is the use of super computers and parallel processing techniques for solving complex computational problems. High-performance computing evolved due to meet increasing demands for processing speed.
HPC brings together several technologies such as
2. What is a co-processor?
A coprocessor is a computer processor used to supplement the functions of the primary processor (the CPU). Operations performed by the coprocessor may be floating point arithmetic, graphics, signal processing, string processing, encryption or I/O Interfacing with peripheral devices. By offloading processor-intensive tasks from the main processor, coprocessors can accelerate system performance.
A coprocessor may not be a general-purpose processor in its own right. Coprocessors cannot fetch instructions from memory, execute program flow control instructions, do input/output operations, manage memory, and so on. The coprocessor requires the host (main) processor to fetch the coprocessor instructions and handle all other operations aside from the coprocessor functions.
3. What is the Xeon Phi coprocessor?
Intel Xeon Phi coprocessors are PCI Express form factor add-in cards that work synergistically with Intel® Xeon® processors to enable dramatic performance gains for highly parallel code—up to 1.2 double-precision teraFLOPS (floating point operations per second) per coprocessor.
Intel Xeon Phi cores are Pentium cores and works as coprocessor to host processor. Due to the fact that it is based on Pentium core allowed developers to port many of the tools and development environment from Intel® Xeon®
based processor to the Xeon Phi coprocessor. The Xeon Phi runs on a Micro OS
based on Linux kernel rather than the driver based model often used for PCI express based attached cards like Graphics cards on a system.
4. What are the execution models in the Intel Xeon Phi coprocessor?
There are various execution models that can be used to design and execute an application on Intel® Xeon Phi coprocessor in association with the host processor. The programming models supported for the coprocessor may vary
between the Windows OS and Linux OS used on the host system.
The most common execution models are:
5. What is the Offload execution mode?
The Offload execution model is also known as heterogeneous programming mode, here the host system offloads part or all of the computation from one or multiple processes or threads running on host. The application starts execution on the host. As the computation proceeds it can decide to send data to the coprocessor and let that work on it and the host and the coprocessor may or may not work in parallel. This is the common execution model in other coprocessor operating environment.
6. What is the Coprocessor native execution mode?
Intel Xeon Phi hosts a Linux micro OS in it and can appear as another machine connected to the host like another node in a cluster. This execution environment allows the users to view the coprocessor as another compute node. In order to run natively, an application has to be cross compiled for Xeon Phi operating environment. Intel® Composer XE provides simple switch to generate cross compiled code.
7. What is the symmetric execution mode?
In this case the application processes run on both the host and the Intel Xeon Phi coprocessor. They usually communicate through some sort of message passing interface like MPI. This execution environment treats Xeon Phi card as another node in a cluster in a heterogeneous cluster environment.
References:
https://software.intel.com/en-us/mic-developer
As a part of my new assignment, I have begun reading about the all new and powerful Intel Xeon Phi co-processor and its capabilities.
Here is a brief understanding of the basics.
1. What is High Performance Computing (HPC) ?
High-performance computing (HPC) is the use of super computers and parallel processing techniques for solving complex computational problems. High-performance computing evolved due to meet increasing demands for processing speed.
HPC brings together several technologies such as
- computer architecture
- algorithms
- programs
- electronics,
- and system software
2. What is a co-processor?
A coprocessor is a computer processor used to supplement the functions of the primary processor (the CPU). Operations performed by the coprocessor may be floating point arithmetic, graphics, signal processing, string processing, encryption or I/O Interfacing with peripheral devices. By offloading processor-intensive tasks from the main processor, coprocessors can accelerate system performance.
A coprocessor may not be a general-purpose processor in its own right. Coprocessors cannot fetch instructions from memory, execute program flow control instructions, do input/output operations, manage memory, and so on. The coprocessor requires the host (main) processor to fetch the coprocessor instructions and handle all other operations aside from the coprocessor functions.
3. What is the Xeon Phi coprocessor?
Intel Xeon Phi coprocessors are PCI Express form factor add-in cards that work synergistically with Intel® Xeon® processors to enable dramatic performance gains for highly parallel code—up to 1.2 double-precision teraFLOPS (floating point operations per second) per coprocessor.
Intel Xeon Phi cores are Pentium cores and works as coprocessor to host processor. Due to the fact that it is based on Pentium core allowed developers to port many of the tools and development environment from Intel® Xeon®
based processor to the Xeon Phi coprocessor. The Xeon Phi runs on a Micro OS
based on Linux kernel rather than the driver based model often used for PCI express based attached cards like Graphics cards on a system.
4. What are the execution models in the Intel Xeon Phi coprocessor?
There are various execution models that can be used to design and execute an application on Intel® Xeon Phi coprocessor in association with the host processor. The programming models supported for the coprocessor may vary
between the Windows OS and Linux OS used on the host system.
The most common execution models are:
- Offload Execution Mode
- Coprocessor Native Execution Mode
- Symmetric Mode
 | ||||||
| Intel Xeon Phi Execution Modes |
5. What is the Offload execution mode?
The Offload execution model is also known as heterogeneous programming mode, here the host system offloads part or all of the computation from one or multiple processes or threads running on host. The application starts execution on the host. As the computation proceeds it can decide to send data to the coprocessor and let that work on it and the host and the coprocessor may or may not work in parallel. This is the common execution model in other coprocessor operating environment.
6. What is the Coprocessor native execution mode?
Intel Xeon Phi hosts a Linux micro OS in it and can appear as another machine connected to the host like another node in a cluster. This execution environment allows the users to view the coprocessor as another compute node. In order to run natively, an application has to be cross compiled for Xeon Phi operating environment. Intel® Composer XE provides simple switch to generate cross compiled code.
7. What is the symmetric execution mode?
In this case the application processes run on both the host and the Intel Xeon Phi coprocessor. They usually communicate through some sort of message passing interface like MPI. This execution environment treats Xeon Phi card as another node in a cluster in a heterogeneous cluster environment.
References:
https://software.intel.com/en-us/mic-developer
The following links and documents contain good examples and guidelines for a novice when programming for the Intel Xeon Phi.
http://software.intel.com/sites/default/files/article/335818/intel-xeon-phi-coprocessor-quick-start-developers-guide.pdfhttp://software.intel.com/en-us/articles/building-a-native-application-for-intel-xeon-phi-coprocessors
http://www.drdobbs.com/parallel/programming-intels-xeon-phi-a-jumpstart/240144160
http://www.prace-project.eu/IMG/pdf/Best-Practice-Guide-Intel-Xeon-Phi.pdf
http://software.intel.com/sites/default/files/article/366893/offload-runtime-for-the-intelr-xeon-phitm-coprocessor.pdf
http://research.colfaxinternational.com/file.axd?file=2013%2F5%2FColfax_Static_Libraries_Xeon_Phi.pdf
https://hpcforge.org/plugins/mediawiki/wiki/pracewp8/images/6/68/XeonPhi.pdf
http://software.intel.com/en-us/articles/getting-started-with-openmp
http://d3f8ykwhia686p.cloudfront.net/1live/intel/An_Introduction_to_Vectorization_with_Intel_Compiler_021712.pdf
Written on January 20, 2015